FDS2672 n-channel ultrafet trench ? mosfet ?2006 fairchild semiconductor corporation FDS2672 rev. b www.fairchildsemi.com 1 tm august 2006 mosfet maximum ratings t a = 25c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 200 v v gs gate to source voltage 20 v i d drain current -continuous (note 1a) 3.9 a -pulsed 50 e as single pulse avalanche energy (note 3) 37.5 mj p d power dissipation (note 1a) 2.5 w power dissipation (note 1b) 1.0 t j , t stg operating and storage temperature -55 to 150 c r jc thermal resistance, junction to case (note 1) 25 c/w r ja thermal resistance, junction to ambient (note 1a) 50 r ja thermal resistance, junction to ambient (note 1b) 125 device marking device reel size tape width quantity FDS2672 FDS2672 13?? 12mm 2500 units FDS2672 n-channel ultrafet trench ? mosfet 200v, 3.9a, 70m ? features ? max r ds(on) = 70m ? at v gs = 10v, i d = 3.9a ? max r ds(on) = 80m ? at v gs = 6v, i d = 3.5a ? fast switching speed ? high performance trench tec hnology for extremely low r ds(on) ? rohs compliant general description this single n-channel mo sfet is produced using fairchild semiconductor?s advanced uitrafet trench ? process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. application ? dc-dc conversion pin 1 so-8 4 3 2 1 5 6 7 8 d d d d g s s s
FDS2672 n-channel ultrafet trench ? mosfet FDS2672 rev. b www.fairchildsemi.com 2 electrical characteristics t j = 25c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain to source breakdown voltage i d = 250 p a, v gs = 0v 200 v ' bv dss ' t j breakdown voltage temperature coefficient i d = 250 p a, referenced to 25 c 206 mv/ c i dss zero gate voltage drain current v ds = 160v, v gs =0v 1 p a v ds = 160v, v gs =0v t j = 55 c 10 p a i gss gate to source leakage current v gs = 20v 100 na on characteristics v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 p a 2 2.9 4 v ' v gs(th) ' t j gate to source threshold voltage temperature coefficient i d = 250 p a, referenced to 25 c -11 mv/ c r ds(on) drain to source on resistance v gs = 10v, i d = 3.9a 59 70 m : v gs = 6v, i d = 3.5a 63 80 v gs = 10v, i d = 3.9a, t j = 125 c 124 148 g fs forward transcondductance v ds = 10v , i d = 3.9a 15 s (note 2) dynamic characteristics c iss input capacitance v ds = 100v, v gs = 0v, f = 1mhz 1905 2535 pf c oss output capacitance 100 135 pf c rss reverse transfer capacitance 30 45 pf r g gate resistance f = 1mhz 0.7 : switching characteristics t d(on) turn-on delay time v dd = 100v, i d = 3.9a v gs = 10v, r gen = 6 : 22 35 ns t r rise time 10 20 ns t d(off) turn-off delay time 35 56 ns t f fall time 10 20 ns q g(tot) total gate charge at 10v v dd =100v i d = 3.9a 33 46 nc q gs gate to source gate charge 11 nc q gd gate to drain ?miller?charge 7 nc drain-source diode characteristics v sd source to drain diode voltage v gs = 0v, i s = 3.9a 0.75 1.2 v t rr reverse recovery time i f = 3.9a, di/dt = 100a/ p s 67 101 ns q rr reverse recovery charge i f = 3.9a, di/dt = 100a/ p s 179 269 nc notes: 1: r t ja is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as th e solder mounting surface of the drain pins. r t jc is guaranteed by design while r t ca is determined by the user?s board design. 2: pulse test: pulse width < 300 us, duty cycle < 2.0%. 3: starting t j = 25 c, l = 3mh, i as = 5a, v dd = 100v, v gs = 10v scale 1:1 on letter size paper a) 50c/w (10 sec) 62.5c/w steady state when mounted on a 1in 2 pad of 2 oz copper b) 125c/w when mounted on a minimum pad .
FDS2672 n-channel ultrafet trench ? mosfet FDS2672 rev. b www.fairchildsemi.com 3 typical characteristics t j = 25c unless otherwise noted figure 1. on region characteristics 01234 0 10 20 30 40 50 pulse duration = 80 p s duty cycle = 0.5%max v gs = 4.5v v gs = 5v v gs = 6v v gs = 10v i d , drain current (a) v ds , drain to source voltage (v) figure 2. normalized 0 5 10 15 20 25 30 35 40 45 50 0.5 1.0 1.5 2.0 2.5 3.0 v gs = 4.5v v gs = 5v v gs = 6v v gs = 10v i d , drain current(a) normalized drain to source on-resistance pulse duration = 80 p s duty cycle = 0.5%max on-resistance vs drain current and gate voltage figure 3. -50 -25 0 25 50 75 100 125 150 0.4 1.0 1.6 2.2 2.8 i d = 3.9a v gs = 10v normalized drain to source on-resistance t j , junction temperature ( o c ) normalized on resistance vs junction temperature figure 4. 3.0 4.5 6.0 7.5 9.0 40 60 80 100 120 140 160 180 pulse duration = 80 p s duty cycle = 0.5%max t j = 150 o c t j = 25 o c i d = 3.9a r ds(on) , drain to source on-resistance ( m : ) v gs , gate to source voltage (v) 10 on-resistance vs gate to source voltage figure 5. transfer characteristics 23456 0 5 10 15 20 25 30 v dd = 10v pulse duration = 80 p s duty cycle = 0.5%max t j = - 55 o c t j = 25 o c t j = 150 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1e-3 0.01 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0v i s , reverse drain current (a) v sd , body diode forward voltage (v) source to drain diode forward voltage vs source current
FDS2672 n-channel ultrafet trench ? mosfet FDS2672 rev. b www.fairchildsemi.com 4 figure 7. 0 8 16 24 32 40 0 2 4 6 8 10 v dd = 100v v dd = 50v v gs , gate to source voltage(v) q g , gate charge(nc) v dd = 150v gate charge characteristics figure 8. 0.1 1 10 10 0 10 100 1000 10000 f = 1mhz v gs = 0v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss capacitance vs drain to source voltage figure 9. 0.01 0.1 1 10 100 1000 0.1 1 10 t j = 25 o c t j = 125 o c t av , time in avalanche(ms) i as , avalanche current ( a ) unclamped inductive switching capability figure 10. 25 50 75 100 125 150 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 r t ja = 50 o c/w v gs = 6v v gs = 10v i d , drain current (a) t a , ambient temperature ( o c ) ambient continuous drain current vs case temperature figure 11. 0.01 0.1 1 10 100 1000 10 -3 10 -2 10 -1 10 0 10 1 10 2 1ms 100us 10ms 100ms 1s dc single pulse t j = max rated t a = 25 o c operation in this area may be limited by r ds(on) limited by package i d , drain current (a) v ds , drain-source voltage (v) forward bias safe operating area figure 12. single 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 10 3 1 10 100 1000 v gs = 10v single pulse p ( pk ) , peak transient power (w) t, pulse width (s) 3000 t a = 25 o c i = i 25 for temperatures above 25 o c derate peak 150 t a ? 125 ----------------------- - pulse maximum power dissipation typical characteristics t j = 25c unless otherwise noted
FDS2672 n-channel ultrafet trench ? mosfet FDS2672 rev. b www.fairchildsemi.com 5 figure 13. transient thermal response curve 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 10 3 1e-4 1e-3 0.01 0.1 1 duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (s) d = 0.5 0.2 0.1 0.05 0.02 0.01 single pulse 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a typical characteristics t j = 25c unless otherwise noted thermal characterization performed us ing the conditions described in note 1b transient thermal response will change depending on the circuit board design
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